The semiconductor industry is entering an era in which the most important breakthroughs are often hidden inside the layers between a transistor and a finished system. This briefing examines what this development means, why it matters now, and which signals will determine its lasting value.
NVIDIA has started installing Vera Rubin NVL144 racks at
NVIDIA has started installing Vera Rubin NVL144 racks at several hyperscale operators, closing a supply negotiation that shaped data center budgets for most of 2026. The system pairs the company's first custom Arm-based CPU with Rubin accelerators and HBM4 memory. NVIDIA quotes 3.6 exaflops of FP4 inference and 1.2 exaflops of FP8 training per rack, numbers that depend as much on memory bandwidth as on raw matrix throughput.
Rubin is a dual-die GPU built on TSMC's 3nm process,
Rubin is a dual-die GPU built on TSMC's 3nm process, with each package carrying 288GB of HBM4 and roughly 8 TB/s of memory bandwidth. The NVL144 designation counts 144 GPU dies across 72 packages, all connected through NVLink 6, which provides about 260 TB/s of aggregate scale-up bandwidth per rack. Vera contributes 88 custom Arm cores and a large LPDDR5X memory pool, and the rack uses a fully liquid-cooled tray design with a 45-degree Celsius coolant inlet. Power density has crossed 600 kilowatts per rack, making facility retrofits the practical limit on deployment speed.
NVIDIA: The supply chain has been the harder
The supply chain has been the harder constraint. HBM4 allocation from SK Hynix, Samsung, and Micron was effectively sold out before Rubin's launch, and CoWoS-L interposer capacity remains the second bottleneck. NVIDIA has responded by qualifying more board and rack partners than in previous generations, spreading assembly across ODMs in Taiwan, Mexico, and the United States. Hyperscalers are also being asked to accept power-optimized SKUs with reduced clock targets in exchange for earlier delivery slots, a practice that mirrors the allocation era of the H100.
Software is where the transition is least visible?
Software is where the transition is least visible but most consequential. The Dynamo inference stack now schedules work across prefill and decode pools that span multiple racks, and the company has pushed NVFP4 quantization into more libraries so that the advertised FP4 throughput is reachable on real models rather than only on microbenchmarks. Customers running mixture-of-experts workloads report that memory capacity, not arithmetic, determines how many experts can remain resident, which explains why 288GB per package matters more than the peak flops figure.
Competition has also changed
Competition has also changed. AMD's Helios racks and a growing list of custom ASICs from Broadcom and Marvell give hyperscalers credible alternatives, though none yet matches NVIDIA's software breadth. The next inflection is Rubin Ultra and the NVL576 configuration in 2027, which will require another generation of HBM and another round of facility upgrades. For now, the Rubin ramp looks less like a product launch than a test of whether the industry can industrialize memory and packaging as fast as it can design compute.