TSMCTSMC 2nm Nanosheet Production Line Achieves Record High Initial Yields Ahead of Major Client Shipments
Taiwan Semiconductor Manufacturing Company (TSMC) has successfully stabilized its 2nm GAAFET manufacturing process, reporting initial wafer sorting yields that surpass internal forecasts and outpace previous node introductions at similar lifecycle stages.
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IntelIntel Foundry Secures Strategic Defense Microelectronics Partnership for Domestic Advanced Packaging
Intel's foundry division has entered into a major multi-year agreement to supply domestic advanced packaging and secure multi-chip module fabrication for critical infrastructure and defense applications.
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SamsungSamsung Electronics Unveils Back-Side Power Delivery Network Strategy for 1.4nm Foundry Node
Samsung Foundry has outlined its technical roadmap for implementing back-side power delivery network technology, aiming to eliminate voltage droop and routing congestion in sub-2nm chip designs.
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TSMCBackside Power Distribution Networks Validate Sub-1.8nm Logic Scaling and Voltage Stability
Leading logic foundries have successfully completed electrical validation test chips utilizing backside power delivery, proving significant reductions in IR drop and signal routing congestion.
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imecComplementary FET (CFET) Architecture Achieves Monolithic Vertical Stacking for Sub-1nm Logic
Imec and leading logic foundries have successfully fabricated complementary field-effect transistors, stacking nMOS and pMOS devices vertically to double standard cell layout density.
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TSMCMonolithic 3D Integration Combines Logic and Non-Volatile Memory for Ultra-Dense Edge SoCs
Foundry R&D teams have achieved monolithic three-dimensional stacking of resistive memory directly atop logic circuits, drastically shrinking the footprint of edge intelligence processors.
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